Product
English > SVO-03-MIPI
MIPI Generator
SVO-03-MIPI■ Overview
Instead of using an actual CMOS image sensor, recorded videos or computer-graphics images on a PC can be output to image processing devices such as ECUs. You can freely adjust the video output timing, enabling various MIPI camera emulations.
HDMI can also be used as an input interface. In this case you can adjust EDID settings as well as MIPI output timing.
This board facilitates the smooth development of image processing equipment even during the camera development, by using simulator videos.
■ Characteristics
• Supports MIPI CSI-2 up to 1Gbps/lane
• Input from USB3.0 or HDMI
• Supports 4Gbps automotive serializer
• Input from USB3.0 or HDMI
• Supports 4Gbps automotive serializer
■ Configuration Example
| Table Item | Specification | Remarks | |
|---|---|---|---|
| Video input interface | USB3.0 (Windows) HDMI (Up to 1080P-60fps) |
Special HDMI monitors are available individually | |
| Video output interface | MIPI CSI-2 video signal | Supports FPD-Link III, GMSL, GVIF2 as serializer | |
| Input resolution | Up to 8190x4095 pixel | In the case of 1920x1080 (USB mode) about 80 fps In the case of 1920x1080 (HDMI mode) about 60 fps |
|
| Output bit rate | Within 4.0 Gbps | In the case of 1920x1080, about 90 fps In the case of 1280x720, about 180 fps |
|
| Supported sync signal | Frame Start, Frame End | ー | |
| Number of supported data lanes | 1 ～ 4 lanes | ー | |
| Data rate per lane | 100 ～ 950 Mbps | ー | |
| Clock rate | 50 ～ 475 MHz | ー | |
| Supported pixel formats | YUV422 / RGB24 / Raw8, 10, 12, 16, 20, 24 |
ー | |
| Other interfaces | I2C | Frequency：100 kHz | Voltage level follows VDDL |
| GPIO | 16bit, IN/OUT direction control for each bit, Direct connection to FPGA |
Voltage level follows VDDL | |
| Power supply | Board power (input) | USB bus power / Dedicated 2pin connector (5V) |
ー |
| Target side power (output) | VDDIO = 1.8 or 2.5 or 3.3 V / 3.3 & 1.2 V output available |
VDDIO ：IO power supply setting | |
| Other functions | Video output timing setting : Pixel clock unit (including blank), Multiple frame synchronous output : FrameSYNC signal Virtual Channel and Embedded Line are available individually |
CntinuousClock / NonContinuousClock are supported |
|
| Interface connector | 60 pin (QSH-030-01-L-D-A) | ー | |
| FPGA | Artix-7 (XC7A35T) + Meticom (MC20902) |
Meticom is an IC for MIPI D-PHY | |
| Frame memory | 256 MByte (DDR3-SDRAM) | ー | |
| USB3.0 chip | Cypress EZ-USB FX3 | ー | |
| HDMI chip | ADV7612 | ー | |
| Dimensions | length x width x height = 101.6 x 101.6 x 25.7 (mm) |
Including spacer (10mm) in height | |
| Attached software Windows |
Video output software | SVOGenerator | ー |
| I2C control software | SVOCtl | Including SV board update application | |
| Supported SerDes boards of our company |
DS90UB953, CXD4963 etc., | ー | |
Application software：NVCap & SVMCtl, Test pattern output function, Image clipping function
■ Design Documents
■ Full Package Download
■ Application
Display video signal of camera modules or CMOS sensors to DisplayPort monitor,
Around view development, Simultaneous monitoring of multiple sensors.
Around view development, Simultaneous monitoring of multiple sensors.
■ Application Areas
Automotive / transportation equipment, medical testing / analysis / measurement, IT / information / communications, software, education / research institutions, and so on.
Notes: Product names and company names are trademarks of each companies.
These data may be changed without a preliminary announcement for specification change.